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Electronic System Level (ESL) design has mainstreamed – it is now an established approach at most of the world’s leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with ‘no links to implementation’, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems.
This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption.
ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today.
Table of Contents
CHAPTER 1: WHAT IS ESL?
CHAPTER 2: TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL
CHAPTER 3: EVOLUTION OF ESL DEVELOPMENT
CHAPTER 4: WHAT ARE THE ENABLERS OF ESL?
CHAPTER 5: ESL FLOW
CHAPTER 6: SPECIFICATIONS AND MODELING
CHAPTER 7: PRE-PARTITIONING ANALYSIS
CHAPTER 8: PARTITIONING
CHAPTER 9: POST-PARTITIONING ANALYSIS AND DEBUG
CHAPTER 10: POST-PARTITIONING VERIFICATION
CHAPTER 11: HARDWARE IMPLEMENTATION
CHAPTER 12: SOFTWARE IMPLEMENTATION
CHAPTER 13: USE OF ESL FOR IMPLEMENTATION VERIFICATION
CHAPTER 14: RESEARCH, EMERGING AND FUTURE PROSPECTS
APPENDIX: LIST OF ACRONYMS
Provides broad, comprehensive coverage not available in any other such book
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