Book description
As systems being developed by industry and government grow larger and more complex, the need for superior specification and verification approaches and tools becomes increasingly vital. The developer and customer must have complete confidence that the design produced is correct, and that it meets forma development and verification standards. In this text, UML expert author Dr. Doron Drusinsky compiles all the latest information on the application of UML (Universal Modeling Language) statecharts, temporal logic, automata, and other advanced tools for run-time monitoring and verification. This is the first book that deals specifically with UML verification techniques. This important information is introduced within the context of real-life examples and solutions, particularly focusing on national defense applications. A practical text, as opposed to a high-level theoretical one, it emphasizes getting the system developer up-to-speed on using the tools necessary for daily practice.- A practical, tutorial-style text (other books on this topic discuss the tools and formalisms only theoretically)
- Includes an unclassified case study example from the U.S. Missile Defense project
Table of contents
- Front matter
- Dedication
- Contents
- Preface
- Acknowledgments
- What’s on the CD-ROM?
-
Chapter 1: Formal Requirements and Finite Automata Overview
- 1.1. Terms
- 1.2. Finite Automata: The Basics
- 1.3. Regular Expressions
- 1.4. Deterministic Finite Automata and Finite State Diagrams (1/2)
- 1.4. Deterministic Finite Automata and Finite State Diagrams (2/2)
- 1.5. Nondeterministic Finite Automata
- 1.6. Other Forms of FA (1/2)
- 1.6. Other Forms of FA (2/2)
- 1.7. FA Conversions and Lower Bounds (1/2)
- 1.7. FA Conversions and Lower Bounds (2/2)
- 1.8. Operations on Regular Requirements
- 1.9. Succinctness of FA
- 1.10. Specifications as Zipped Requirements
- 1.11. Finite State Machines
- 1.12. Normal Form and Minimization of FA and FSMs
-
Chapter 2: Statecharts
- 2.1. Transformational vs. Reactive Components
- 2.2. Statecharts in Brief
- 2.3. A Related Tool
- 2.4. Basic Elements of Statecharts (1/6)
- 2.4. Basic Elements of Statecharts (2/6)
- 2.4. Basic Elements of Statecharts (3/6)
- 2.4. Basic Elements of Statecharts (4/6)
- 2.4. Basic Elements of Statecharts (5/6)
- 2.4. Basic Elements of Statecharts (6/6)
- 2.5. Code Generation and Scheduling (1/3)
- 2.5. Code Generation and Scheduling (2/3)
- 2.5. Code Generation and Scheduling (3/3)
- 2.6. Event-Driven Statecharts, Procedural Statecharts, and Mixed Flowcharts and Statecharts
- 2.7. Flowcharts inside Statecharts: Workflow within Event-Driven Controllers
- 2.8. Nonstandard Elements of Statecharts (1/2)
- 2.8. Nonstandard Elements of Statecharts (2/2)
- 2.9. Passing Data to a Statechart Controller
- 2.10. JUnit Testing of Statechart Objects
- 2.11. Statecharts vs. Message Sequence Charts and Scenarios
- 2.12. Probabilistic Statecharts
-
Chapter 3: Academic Specification Languages for Reactive Systems
- 3.1. Natural Language Specifications
- 3.2. Using Specification Languages for Runtime Monitoring
- 3.3. Linear-time Temporal Logic (LTL) (1/6)
- 3.3. Linear-time Temporal Logic (LTL) (2/6)
- 3.3. Linear-time Temporal Logic (LTL) (3/6)
- 3.3. Linear-time Temporal Logic (LTL) (4/6)
- 3.3. Linear-time Temporal Logic (LTL) (5/6)
- 3.3. Linear-time Temporal Logic (LTL) (6/6)
- 3.4. Other Formal Specification Languages for Reactive Systems (1/2)
- 3.4. Other Formal Specification Languages for Reactive Systems (2/2)
-
Chapter 4: Using Statechart Assertions for Formal Specification
- 4.1. Statechart Specification Assertions
- 4.2. Nondeterministic Statechart Assertions (1/7)
- 4.2. Nondeterministic Statechart Assertions (2/7)
- 4.2. Nondeterministic Statechart Assertions (3/7)
- 4.2. Nondeterministic Statechart Assertions (4/7)
- 4.2. Nondeterministic Statechart Assertions (5/7)
- 4.2. Nondeterministic Statechart Assertions (6/7)
- 4.2. Nondeterministic Statechart Assertions (7/7)
- 4.3. Operations on Assertions
- 4.4. Quantified Distributed Assertions
- 4.5. Runtime Recovery for Assertion Violations
- 4.6. The Language Dog-Fight: Statechart Assertions vs. LTL and ERE (1/2)
- 4.6. The Language Dog-Fight: Statechart Assertions vs. LTL and ERE (2/2)
- 4.7. Succinctness of Pure Statechart Assertions
- 4.8. Temporal Assertions vs. JML and Java Assertions
- 4.9. Commonly Used Assertions
-
Chapter 5: Creating and Using Temporal Statechart Assertions
- 5.1. Motivation, or Why Use Temporal Assertions?
- 5.2. Applying Assertions: Three Uses
- 5.3. Writing Assertions (1/3)
- 5.3. Writing Assertions (2/3)
- 5.3. Writing Assertions (3/3)
- 5.4. Runtime Execution Monitoring— Runtime Verification
- 5.5. Runtime Recovery from Requirement Violations
- 5.6. Automatic Test Generation
- 5.7. Execution-Based Model Checking (1/3)
- 5.7. Execution-Based Model Checking (2/3)
- 5.7. Execution-Based Model Checking (3/3)
- Chapter 6: Application of Formal Specifications and Runtime Monitoring to the Ballistic Missile Defense Project
- Appendix: TLCharts: Syntax and Semantics
- Notes (1/2)
- Notes (2/2)
- About the Author
- Index (1/2)
- Index (2/2)
Product information
- Title: Modeling and Verification Using UML Statecharts
- Author(s):
- Release date: April 2011
- Publisher(s): Newnes
- ISBN: 9780080481470
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